Galois LFSR: A Concurrent Pseudo Random Number Generator

Concurrent pseudo random number (PRN) generation is crucial in various applications, including testing and validation of integrated circuits. Linear Feedback Shift Registers (LFSRs) are widely used to generate PRNs due to their simplicity and effectiveness. In this article, we will describe the mathematical procedure for concurrent PRN generation using LFSRs in FPGA and ASIC technology.

Advantages of Galois LFSR

One of the advantages of implementing an LFSR in software is that it can be done in a more efficient manner using the Galois form. This form allows XOR operations to be implemented word-at-a-time, reducing the computational complexity of the algorithm. Additionally, each tap can be computed in parallel, increasing the speed of execution.

Parallel Test Pattern Generator

We have considered the implementation of a parallel test pattern generator based on an LFSR with multiple outputs used as a building block in built-in-self-test (BIST) design within a System-on-Chip (SoC). The Galois LFSR does not concatenate every tap to produce the new input, instead, the XOR'ing is done within the LFSR. This reduces the propagation times and enables faster execution.

Time Offset and Startpoint

A time offset exists between the streams generated by a Galois LFSR, which means that a different start point will be needed to get the same output each cycle. The internal state of the LFSR is not necessarily the same as the Fibonacci register, but the order of the taps is the counterpart of the conventional LFSR.

In conclusion, the Galois LFSR is an efficient and effective way to generate concurrent PRNs using LFSRs in FPGA and ASIC technology. Its advantages include reduced computational complexity, increased speed of execution, and improved parallelism. The proposed design can be used as a building block in BIST designs within SoCs.

Galois lfsr